🚀 go-pugleaf

One more about the recent publicity given the IBM "America" chip set...

The trade press (such as it is) would have us believe that America has made
some major innovation in providing five instructions executing in parallel.
However, to achieve this rate--which has actually been billed as "5
instructions/cycle"--you have to do a branch in one of every five instruc-
tions!  Since the magic figure of 5 requires using the floating-point
unit's multiply-and-accumulate capability, if you're doing only integer
work, you need a branch every three instructions!  You NEED goto's!

I do *not* want to maintain the sort of code that will keep this processor
running at max issue rate!

Now, mind you, I am not trying to belittle the work IBM has done.  Branches
are in some sense the nemesis of very fast CPUs, and it helps to be working
ahead and being able to handle branches without too much delay.  I'm only
pissed off at the pseudomarketing we're seeing in the trade press.  The
processor may be able to issue 5 instructions in some ideal cycle, but it
does NOT run at 5 instructions/cycle for any believable piece of code!

(Or maybe it could...who knows; you might be able to replicate code and
scramble the branches around enough to get close for some codes.  But it
would take a compiler which could look down various paths and figure out
how instructions could be scheduled along the different paths and
replicated, sorting out the hazards...I suppose you could call it something
like "trace scheduling"...Bob Colwell, you there?  I see a customer for
your technology!:-):-):-)
-- 
Dick Dunn     rcd@ico.isc.com    uucp: {ncar,nbires}!ico!rcd     (303)449-2870
   ...No DOS.  UNIX.