Article View: comp.arch
Article #2942Re: RISC multiprocessors
From: mac
Date: Fri, 10 Nov 1989 23:27
Date: Fri, 10 Nov 1989 23:27
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1217 bytes
In article <280004@hpdml93.HP.COM> sritacco@hpdml93.HP.COM (Steve Ritacco) writes: > > The R3000 (mips) has support for necessary multiprocessing features > built in. There is support for reading from the data cache and invalidating > data cache entries. This would allow a snooping system to be built fairly > efficiently. > Yeah, the cache works, but MIPSCo provides no support for MP synchronization, forcing you to either do it as a system call (Slow; OS doesn't get to use it.) or in hardware ( what we did ). Things will (presumably) get better with newer chips... -- Michael McNamara (St)ardent, Inc. mac@ardent.com
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arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!samsung!uunet!lll-winken!ubvax!ardent!macReferences:
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!uwm.edu!uakari.primate.wisc.edu!samsung!uunet!lll-winken!ubvax!ardent!mac From: mac@ardent.com Newsgroups: comp.arch Subject: Re: RISC multiprocessors Message-ID: <MAC.89Nov10152758@rhea.ardent.com> Date: 10 Nov 89 23:27:58 GMT References: <13319@pur-ee.UUCP> <280004@hpdml93.HP.COM> Sender: news@ardent.UUCP Reply-To: mac@ardent.com (Michael McNamara) Organization: Ardent Computer Corporation, Sunnyvale, CA Lines: 18 In-reply-to: sritacco@hpdml93.HP.COM's message of 9 Nov 89 16:35:47 GMT