🚀 go-pugleaf

In article <7000@pt.cs.cmu.edu> lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) writes:
  >... power demand that is also independent of the clock, that is,
  >absolutely constant rather than cyclic.
  >
  >CMOS isn't like that. It's asymmetric, and cares about transitions:
  >0=  >1 takes more power than 1=  >1. So, one can write worst-case
  >programs, which generate on-chip noise (mass transitions on the wide
  >datapath), or which generate board noise and heat (mass transitions
  >on the address and data pins). I'm not sure what cache activity
  >generally produces the most heat: it may depend on implementation.
  >
  >CMOS is wonderful, but the ECL/GaAs/BiCMOS folks talk an awful good
  >fight about how it's a different world on the other side of 50 MHz.
  >


It's a terrible shame that CMOS parts are being shipped to customers,
for money, which operate over 50MHz.  The ECL/GaAs/BiCMOS folks have
apparently discovered reasons why it can't be done.

Perhaps Brooktree ought to initiate a recall of their CMOS devices
"Bt458" and "Bt468", which operate at 170 and 200 MHz respectively.

Performance Semiconductor and Cypress Semiconductor had better
quit sending 125MHz full-CMOS static RAMs (P4C122, 7C123) to
customers, and their datasheets for 200MHz CMOS parts (P3C3147)
might need to be stamped "proven impossible" quickly.

Even more alarming, the Japanese are in on this conspiracy :-) of
faster-than-is-possible CMOS, too.  Toshiba dares to offer, at
67MHz, their TC5588 CMOS RAM. The video DRAM from Japan's NMB
Semiconductor is suspiciously too-fast as well.
-- 
 -- Mark Johnson	
 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
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