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Article #3028

computation bandwidth

#3028
From: Raul Deluth Rockwell
Date: Thu, 16 Nov 1989 16:32
23 lines
1778 bytes
In article <TOMS.89Nov15114003@omews44.intel.com> toms@omews44.intel.com (Tom Shott) writes:
;> Subject: Re: RISC vs CISC (rational discussion, not religious wars)

;> As we top 50 MHz for chip speed the biggest problem becomes getting data on
;> and off chip. You start needing delay cycles between reads and writes on a
;> IO pin to turn the bus around or a chip w/ lots of pins to get data in and
;> out faster. Putting a cache on the die has been beat into the ground.

;> One solution that has not been discussed is flip chip technology. In flip
;> chip technology many die are mounted directly on a ceramic carrier.
;> . . .

Another solution that I haven't seen much discussion of is using
optical fibers with an ultra-high-speed serial protocol as a method
for transporting data.

As the communication delays are non-trivial, this might be more
applicable to a vector machine, or to an architecure which can deal
with structured data (e.g. messages) than to a super-scalar
architecture, but there are a lot of good options in vector machines,
et al.

--
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Path: arc1-ca.pugleaf.net!utzoo!attcan!sobmips!uunet!cs.utexas.edu!samsung!usc!merlin.usc.edu!usc.edu!raulmill
From: raulmill@usc.edu (Raul Deluth Rockwell)
Newsgroups: comp.arch
Subject: computation bandwidth
Message-ID: <RAULMILL.89Nov16083219@usc.edu>
Date: 16 Nov 89 16:32:19 GMT
References: <503@ctycal.UUCP> <15126@haddock.ima.isc.com>
 <28942@shemp.CS.UCLA.EDU> <31097@winchester.mips.COM>
 <28985@shemp.CS.UCLA.EDU> <9769@june.cs.washington.edu>
 <31198@winchester.mips.COM> <TOMS.89Nov15114003@omews44.intel.com>
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In-reply-to: toms@omews44.intel.com's message of 15 Nov 89 16:40:03 GMT