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Article #3082Re: Late, Lamented E&S-1 -- whats it look like?
From: Hugh LaMaster
Date: Mon, 20 Nov 1989 20:54
Date: Mon, 20 Nov 1989 20:54
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According to the preliminary product information, the key "interesting" system component was a crossbar switch which permitted 16 processors to access up to 256 MBytes of (interleaved) memory. There was also a second level of processors/memory possible. I will bet that someone will put a similar crossbar together with an R6000, 88k, or SPARC system and make multitasking cheap and commericial. At least the E&S design had some bandwidth in it, unlike most of the bus-based systems you see out there :-). Hugh LaMaster, m/s 233-9, UUCP ames!lamaster NASA Ames Research Center ARPA lamaster@ames.arc.nasa.gov Moffett Field, CA 94035 Phone: (415)694-6117
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cs.utexas.edu!tut.cis.ohio-state.edu!ucbvax!agate!eos!athena!lamaster From: lamaster@athena.arc.nasa.gov (Hugh LaMaster) Newsgroups: comp.arch Subject: Re: Late, Lamented E&S-1 -- whats it look like? Message-ID: <5611@eos.UUCP> Date: 20 Nov 89 20:54:12 GMT References: <36652@apple.Apple.COM> Sender: news@eos.UUCP Reply-To: lamaster@athena.arc.nasa.gov (Hugh LaMaster) Lines: 17