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Article #3122

Clock Rates (was ATTACK OF KILLER MICROS)

#3122
From: Donald Lindsay
Date: Thu, 23 Nov 1989 19:02
48 lines
2864 bytes
nelson@m.cs.uiuc.edu writes:
>> If you project the slope of the clock rates of supercomputers, you
>> will see sub-nanosecond CYCLE times before 1995.
> Actually, I don't see this (dare I say it) EVER occuring. 

Oh ye of little faith!

Today's gates are, repeat after me, slow, slow, slow!  For example,
if you build a ring oscillator on a Motorola MCA3 ECL gate array, you
see a 120 picosecond gate delay. Many major labs have built ring
oscillators at 20 ps or below. The lab record for a HEMT (ie
GaAs/AlGaAs) is about 10 picoseconds. That's at room temperature: in
liquid nitrogen the HEMT record is better than 6 picoseconds. Beyond
HEMT is a zoo of proposed exotic devices: unipolar tunnelling
transistors, quantam dots, and the like. There is one thing that is
sure: today's Y-MP gates aren't the last word in speed.

As for SRAM .. already there are lab chips with access times under
one nanosecond. Cypress is currently advertising a 3 nano SRAM
(1Kx4).

>a nanosecond is only 12 inches of wire

More precisely, a nanosecond is 30 cm. in a vacuum. The copper of the
VAX 9000 circuit board (MCU) gets 160 picoseconds/inch. However, an
MCU is only 4 inches across (two thirds of a nanosecond), and can
realisticaly hold 40 or 50 SRAMs. Plus, of course, we would expect a
hot processor to have an on-chip cache. The fancy packaging would be
important only to keep the second-level cache nearby, thus reducing
the cost of a first-level miss.

A more serious problem is power distribution. The 10 picosecond HEMT
took a milliwatt per gate: ouch. Luckily, liquid nitrogen
temperatures reduce resistivity by a factor of six. That temperature
also slows down physical processes - including the physical processes
by which chips fail (such as atoms electromigrating downstream in
your power wires).

The other serious problem is signal distribution around a chip.
Wiring doesn't shrink as easily as devices, so we will see heavy
emphasis on keeping things local.  Special purpose chips (say, signal
processing pipelines) might get the equivalent of 10 GHz before the
century is out.  General purpose chips have to push signals through
metal (e.g. the bus through the cache) and will probably bottleneck
on the capacitance.
-- 
Don		D.C.Lindsay 	Carnegie Mellon Computer Science
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Message-ID: <7076@pt.cs.cmu.edu>
Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!MATHOM.GANDALF.CS.CMU.EDU!lindsay
References: <221@dg.dg.com> <3300084@m.cs.uiuc.edu> <1753@crdos1.crd.ge.COM>

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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!MATHOM.GANDALF.CS.CMU.EDU!lindsay
From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay)
Newsgroups: comp.arch
Subject: Clock Rates (was ATTACK OF KILLER MICROS)
Summary: GHz is coming
Keywords: GHz HEMT ECL clock liquid nitrogen
Message-ID: <7076@pt.cs.cmu.edu>
Date: 23 Nov 89 19:02:31 GMT
References: <221@dg.dg.com> <3300084@m.cs.uiuc.edu> <1753@crdos1.crd.ge.COM>
Organization: Carnegie-Mellon University, CS/RI
Lines: 48