Article View: comp.arch
Article #3252Re: VME Bus Standard
From: Donald Lindsay
Date: Fri, 01 Dec 1989 18:08
Date: Fri, 01 Dec 1989 18:08
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2771 bytes
In article <3070@cello.UUCP> alvitar@weasel.austin.ibm.com (Phillip L. Harbison) writes:
>[1] No justified data busses!
>[2] Get rid of daisy-chained signal lines!
>[3] Get rid of centralized resource managers.
>[1] Geographic Addressing
>[2] Try-Again Signal
>[3] Cache Consistency (or Coherency)
>[4] Pin & Socket Connectors
>[5] Support Redundant Busses
>[6] Hardware Semaphores
To which I would add:
[7] Power Mate Before Signal Mate
This allows a board to be inserted into a running system, without
(necessarily) glitching the system. The logic gets to power up
before the signal lines are connected.
[8] Bus Isolation Mode
A freshly-inserted/reset board should be in BI mode. This means that
it "isn't there", electrically and logically. To the rest of the
system, the slot appears to be empty/jumpered. Other boards are free
to respond to addresses which the isolated board would normally have
responded to. This feature is useful for physically adding/removing
boards to/from a running system: for electronically deleting failed
boards: for electronic swapin of spare boards: and for "blocking"
during self-test.
[9] Built In Self Test ( Built In Test Equipment )
Each board should have BIST (BITE) features. The bus should be
involved: the system should be able to force a board into BIST mode.
This also puts the board's interface into BI mode, so that boards
which temporarily/permanently aren't useful, won't be called upon.
There is a question as to how a board comes back out of BIST mode,
depending on why it went in, and what the result was. Also, if the
board has failed, how much can the system find out about the failure.
[10] No Byzantine Agreement
When a system comes up, there should be one board which knows that it
is in charge of bringing up the rest (and the rest should agree).
Software ("byzantine") schemes don't cut it. The initial board should
run BIST, then start putting the other boards through their BIST. The
simplest scheme is just the board in slot zero, but perhaps something
more robust can be found that isn't too complicated. (Maybe we can
assume that the operator put a board in slot zero, but we certainly
can't assume that that board will never fail.)
--
Don D.C.Lindsay Carnegie Mellon Computer Science
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!tut.cis.ohio-state.edu!pt.cs.cmu.edu!MATHOM.GANDALF.CS.CMU.EDU!lindsay From: lindsay@MATHOM.GANDALF.CS.CMU.EDU (Donald Lindsay) Newsgroups: comp.arch Subject: Re: VME Bus Standard Message-ID: <7172@pt.cs.cmu.edu> Date: 1 Dec 89 18:08:30 GMT References: <112400007@uxa.cso.uiuc.edu> <11759@phoenix.Princeton.EDU> <3070@cello.UUCP> Organization: Carnegie-Mellon University, CS/RI Lines: 52