🚀 go-pugleaf

We have one here. I haven't used it, but I've seen speedup curves for
it.  As best, it does about 10Mflops, because they're using 68020's or
with 68881s.

The myrias architecture is based on parallel loops. Completeley parallel.
It's not a shared memory machine.

Imagine you have a parent process with a page of memory. It spawns a
child.  The parent & child touch the page. The page is copy-on-writed.
We now have a Master (M), Parent (P) and Child (C) copy.

When the child dies, we 'merge' the different pages.
Semantics are:
	+ parent or child touch a bit -> get their new bit
	+ both parent & child touch same bit -> get junk

Do this using M xor P xor C, for the entire page.

It's not clear to me that they have any special hardware for this.
Some say aye, some say nay. They do the merging in background. Aside
from the above (which is a simple O/S hack), the box is basically a
lot like an IPSC/2 - circuit switched networks to shuffle 4K pages
around. One could wonder why they didn't just repackage the IPSC/2,
since that would be faster.

If you have a parallel fortran loop with no cross-iteration
dependencies (=), this is a godsend, 'cause it's cheap parallelism. If
you have *any* cross iteration dependenceies (< or >), then it sucks,
because there is *no* (according the mtg I went to) synchronization
between processors.

For the certain applications it was designed for, it's a reasonable
design (although not terribly fast).

Dirk Grunwald -- Univ. of Colorado at Boulder	(grunwald@foobar.colorado.edu)
						(grunwald@boulder.colorado.edu)