Article View: comp.arch
Article #3307Re: Intel 860 Architecture
From: Eugene Brooks
Date: Sun, 10 Dec 1989 07:44
Date: Sun, 10 Dec 1989 07:44
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In article <3818@convex.UUCP> hamrick@convex.COM (Ed Hamrick) writes: > - What other architectures use reciprocal -> multiply for divide? The machines made at CRI do this. > - What are the numerical accuracy tradeoffs? As good as Newton Raphson can be. > - How many cycles does the reciprocal instruction take? Can it be > pipelined? Yes it can be pipelined, on the Cray it is pipelined. I don't remember about the 860. brooks@maddog.llnl.gov, brooks@maddog.uucp
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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!lll-winken!maddog!brooks From: brooks@maddog.llnl.gov (Eugene Brooks) Newsgroups: comp.arch Subject: Re: Intel 860 Architecture Message-ID: <41128@lll-winken.LLNL.GOV> Date: 10 Dec 89 07:44:56 GMT References: <3818@convex.UUCP> Sender: usenet@lll-winken.LLNL.GOV Reply-To: brooks@maddog.llnl.gov (Eugene Brooks) Organization: Lawrence Livermore National Laboratory Lines: 10