🚀 go-pugleaf

In article <28674@amdcad.AMD.COM> davec@proton.amd.com (Dave Christie) writes:
>But coming up with faster versions of classic supercomputers
>has (IMHO) been much more difficult and costly, and the resulting
>performance improvements not so spectacular, as compared to micros over
>the past several years.

Yes. A case in point is the new Cyclone processor from Tandem. I'm
not knocking it: I'm sure that it was built by sharp people, and will
be sold successfully. It has the important property that it's bit-
compatible with Tandem's previous stack machines.

However, it was clearly a major effort - they wrote 420 KB of
microcode, and they did in-house metallization of ECL gate arrays.
Nor did the machine come out small:  each CPU+IOP fills three 18 x
18" boards, and the microcode alone takes over a hundred chips.

So, did they get much for all that? No. It only runs at 22.2 MHz,
although in its defence I should add that it often issues two
instructions per clock. At best, that's 45 MHz.  I don't know the
MIPS/VUPS ratio, but even if the ratio is better than I think, the
Cyclone still isn't as fast as the new ECL RISCs. It's also pretty
well under the wheels of the CMOS steamroller.

Is it reliable? Well, yes, it's a Tandem product. It has parity and
temperature compensation and a diagnostic processor and spare cache
RAMs. But a Killer Micro with the same throughput could be made more
reliable, at a lower price, simply from its reduced chip count.
-- 
Don		D.C.Lindsay 	Carnegie Mellon Computer Science