Article View: comp.arch
Article #3473Re: load instruction on MIPS R2000 and R3000
From: Chris Wagner
Date: Thu, 15 Mar 1990 18:55
Date: Thu, 15 Mar 1990 18:55
21 lines
1162 bytes
1162 bytes
In article <1990Mar14.165530.17748@hellgate.utah.edu>,
moore%cdr.utah.edu@cs.utah.edu (Tim Moore) writes:
> On the MIPS R2000 and R3000 processors, does the following instruction
> have predictable results?
>
> lw $1,some_disp($1)
>
> $1 is also $at and is used internally by the MIPS assembler, but I'm
> not using the MIPS assembler.
> Thanks,
>
> Tim Moore moore@cs.utah.edu
{bellcore,hplabs}!utah-cs!moore
> "Ah, youth. Ah, statute of limitations."
> -John Waters
No problem, this is just fine (if your your doing your own pipeline
scheduling remember
to wait once instruction before accessing AT).
Chris Wagner
Technical Details
Message-ID:
<5306@odin.SGI.COM>Path:
arc1-ca.pugleaf.net!utzoo!attcan!uunet!cs.utexas.edu!samsung!uakari.primate.wisc.edu!ames!sgi!shinobu!odin!moose!jwagReferences:
<1990Mar14.165530.17748@hellgate.utah.edu>Show Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!cs.utexas.edu!samsung!uakari.primate.wisc.edu!ames!sgi!shinobu!odin!moose!jwag From: jwag@moose.sgi.com (Chris Wagner) Newsgroups: comp.arch,comp.sys.sgi Subject: Re: load instruction on MIPS R2000 and R3000 Message-ID: <5306@odin.SGI.COM> Date: 15 Mar 90 18:55:59 GMT References: <1990Mar14.165530.17748@hellgate.utah.edu> Sender: news@odin.SGI.COM Reply-To: jwag@moose.sgi.com (Chris Wagner) Organization: Silicon Graphics, Research & Development Lines: 21