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Article #3524

SIMULATORS FOR COMPUTER ARCHITECTURES

#3524
From: Jayanth T.
Date: Mon, 19 Mar 1990 21:20
35 lines
1965 bytes
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I am posting this for a friend who cannot post from his machine. 
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Any replies please do send it to him directly.
Thanks.
--Jayanth.
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Hi netters,

        I have been reading the comp.news regularly. I think that this is a
very good idea to share some views and solve problems.

        I am working on designing an array architecture for image processing
applications. The problem that I am facing is that I have to simulate that
architecture with some simulation package. I have used Network II.5 before to
simulate variety of architecture, but in this case I have to measure the
performance using specific application algorithms. There is a problem of how
to map the algorithms to the memory structure. If we just assume the loads to
be taking specific time than there are questions in interprocessor
communication which are unanswered.

        I would really appreciate any help I can get on other simulation
packages available for computer architectures, or any techniques available for
testing new architectures.

- Rajiv

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Message-ID: <8436@hubcap.clemson.edu>
Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!ogicse!emory!hubcap!tthyama

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Path: arc1-ca.pugleaf.net!utzoo!attcan!uunet!ogicse!emory!hubcap!tthyama
From: tthyama@hubcap.clemson.edu (Jayanth T.)
Newsgroups: comp.arch
Subject: SIMULATORS FOR COMPUTER ARCHITECTURES
Keywords: SIMULATORS
Message-ID: <8436@hubcap.clemson.edu>
Date: 19 Mar 90 21:20:45 GMT
Organization: Clemson University, Clemson, SC
Lines: 35