Re: RISC goes CISC?

Article View: comp.arch

Article #8006

#8006

From: Damon
Date: Fri, 13 Nov 1992 01:00

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In article <15444@auspex-gw.auspex.com> guy@Auspex.COM (Guy Harris) writes:
>>The i860 is going down the pan, but the new chip to be used by Intel
>>SSD and which will be x86-ish will have a new instruction set.
>
>"Will be x86-ish" and "will have a new instruction set"?
>
>Am I missing something here?  Which will it be - x86-ish, with an x86
>instruction set, or not x86-ish, with a new instruction set?

More the latter, to the best of my knowledge.  That is, it will somehow
resemble the x86 but won't be one.  And it'll be 64-bit.  It won't run
x86 code and it won't run i860 code.  And SSD will be the first
customers and write their own compilers, etc.  That's the best we know,
more or less.

>>This SSD chip is due in 1996.  I wonder if it's really the Pentium?
>
>I've heard claims of a 64-bit member of the x86 family; *if* the chip
>has a new instruction set, perhaps they'll have the x86 instruction set
>as the 32-bit instruction set, and some new instruction set as the
>64-bit instruction set.
>
>Doesn't sound like the Pentium, in any case.

Well, why not?  If Intel delays the Pentium until 1994 it would be due
at about the same time.  This is not to say I think the SSD chip *is*
the Pentium, just that it looks like an interesting coincidence.  This
is not to say I think the SSD chip *is not* the Pentium, either.  B^>

Damon
-- 
Damon Hart-Davis                          Internet: dhd@exnet.co.uk, d@hd.org

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From: dhd@exnet.co.uk (Damon)
Newsgroups: comp.arch
Subject: Re: RISC goes CISC?
Message-ID: <BxMqsB.C5s@exnet.co.uk>
Date: 13 Nov 92 01:00:10 GMT
References: <1992Nov11.011822.20226@labtam.labtam.oz.au> <BxKnK2.Aq0@exnet.co.uk> <15444@auspex-gw.auspex.com>
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