Article View: comp.arch
Article #8035Re: RISC goes CISC?
From: Guy Harris
Date: Sat, 14 Nov 1992 00:46
Date: Sat, 14 Nov 1992 00:46
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1581 bytes
>>>This SSD chip is due in 1996. I wonder if it's really the Pentium? >> >>I've heard claims of a 64-bit member of the x86 family; *if* the chip >>has a new instruction set, perhaps they'll have the x86 instruction set >>as the 32-bit instruction set, and some new instruction set as the >>64-bit instruction set. >> >>Doesn't sound like the Pentium, in any case. > >Well, why not? If it doesn't run x86 code, like the chip you spoke of, it ain't Pentium, which *will* run x86 code, from everything I've heard (in fact, I've not heard that it'll run any other code, except perhaps with the aid of simulators or binary-to-binary translation, but hey, most people are trying to run x86 code on *their* chips, so...). I've not heard anything to make me believe Pentium will run x86 code in some simulation mode, either; from everything I've heard, it's an engine intended to run x86 code, even though there may be something inside it that "looks", in some sense, like a RISC. And if it *does* run x86 code, well: >If Intel delays the Pentium until 1994 it would be due >at about the same time. 1994 and 1996 are "about the same time"?
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Path: arc1-ca.pugleaf.net!sparky!uunet!auspex-gw!guy From: guy@Auspex.COM (Guy Harris) Newsgroups: comp.arch Subject: Re: RISC goes CISC? Message-ID: <15494@auspex-gw.auspex.com> Date: 14 Nov 92 00:46:16 GMT References: <BxKnK2.Aq0@exnet.co.uk> <15444@auspex-gw.auspex.com> <BxMqsB.C5s@exnet.co.uk> Sender: news@auspex-gw.auspex.com Organization: Auspex Systems, Santa Clara Lines: 28 Nntp-Posting-Host: auspex.auspex.com