Article View: comp.arch
Article #20763Re: 486 and 68040
From: Mike Rutenberg
Date: Fri, 14 Apr 1989 20:59
Date: Fri, 14 Apr 1989 20:59
21 lines
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1358 bytes
Michael Slater writes: >- The degree to which clocks per instruction has been reduced. Intel's 486 > provides single-clock loads, stores, and moves. Assuming a cache hit, > data can be used by the instruction immediately following the load, with > no stall cycle at all. It remains to be seen if the 040 will do this. From my memory, the other things that stand out about the i486: * call and return now take significantly fewer clock cycles. * the on-chip fpu is much faster than the 80387. It was unclear if this was due simply to being on-chip or whether it involved architecture changes to the fpu. I belive the bus structure for the i860 and i486 is the same. What support chips for the i486 and mc68040 were announced? Mike -- Mike Rutenberg Reed College, Portland Oregon (503)239-4434 (home) BITNET: mdr@reed.bitnet UUCP: uunet!tektronix!reed!mdr Note: The preceding remarks are intended to represent no known organization
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!mailrus!cornell!uw-beaver!tektronix!reed!mdr From: mdr@reed.UUCP (Mike Rutenberg) Newsgroups: comp.arch Subject: Re: 486 and 68040 Message-ID: <12435@reed.UUCP> Date: 14 Apr 89 20:59:13 GMT References: <17131@cup.portal.com> Reply-To: mdr@reed.UUCP (Mike Rutenberg) Organization: Reed College, Portland OR Lines: 21