🚀 go-pugleaf

In article <1464@cfa.cfa.harvard.EDU> mkraiesk@midas.UUCP (Mark Kraieski) writes:
>in article <2368@ogccse.ogc.edu>, johnr@ogccse.ogc.edu (John Roberts) says:
>> 
>> I'm interested in evaluation of the current crop of RISC processors based
>...
>> 
>> Here's the criteria I currently use:
>> 
>>...
>> 
>> I'd be interested in what criteria other silicon-groupies use for evaluating
>> CPUs (especially as it relates to RISC).
>> 
>> John Roberts
>> "hanging out at Cogent Research, Inc. and Oregon Graduate Center"
>> johnr@ogccse.ogc.edu
>
>There is another angle on the criteria that is just as important as your
>items and may be the deciding factor.  I'm talking about software and
>market factors:
>
>	Availability of O/S and compilers from multiple sources.
>	Mature code generators.
>	Standards (source, object, binary) and conformment.
>	Committment to upward compatibility (family).
>	Scalability.
>	Existing software base and future growth.
>	Reliability in meeting delivery dates.
>	Multiple vendors supplying chip.
>
>Depending on what you plan on doing with the "hottest" RISC chip you can
>find, the above issues may be important if you plan on selling it.  The
>above criteria can make a chip of lower performance more attractive.
>Mark Kraieski                   

Really, the criteria break down into several major catagories:

1.	Will this RISC do my job today?
		Here is where the code generator and
		software base questions go.
2.	Will this RISC do my job tomorrow?
		Here is where the multiple vendors and the
		scalability questions go.
3.	Will I be left in the cold?
		Here is where the ABI questions go.

Each of these criteria can be further simplified.  The first question
can be restated to be "Is there enough there to do my job now?"  This
is in many ways more important than the other questions since RISC support
can take a long time to develop.  The best example I know of is with 
compilers.  Some RISC processors (such as MIPS) have extensively tuned 
compilers behind them.  These compilers are extremely complex and designed 
to squeeze every bit of speed from them.

However, other RISC processors (such as the 88000) with less complex
compilers still beat the pants off of them.  Therefore, it isn't the
maturity of the code generator, it is the delivered bang/$.

As for the second question, I know of no major RISC family which doesn't
have either announced or unannounced follow-on products.  Therefore,
unless someone folds, there probably will be support for the next generation
of products.  Therefore, for now, the second question can almost (;-)
be considered moot.

The third question really boils down to "how do I know I won't make the
wrong choice?"  This one is tough.  We made our choice for well publicised
reasons.  Other companies have made their choices for their own valid
reasons.  Who knows?  I suspect that the market will boil down to two
major CISCs (80x86 and 680x0) and two major RISCs (88K and either SPARC
or MIPS).  

Robert Cousins
Dept. Mgr, Workstation Dev't

Speaking for myself alone.