🚀 go-pugleaf

>3) The AS400 is a capability based tagged architecture.  It offers security
>    like nothing else on the market.  That's not to say that it's perfect,
>    but while all us RISCy folks have been off worrying about MIPS, IBM has
>    noticed that tools providing incredibly tight control over access to
>    information are crucial in many markets.  Try writing an AS400 virus!

Just out of curiosity, how much of the capability stuff is implemented
in what I, at least, would consider the *real* instruction set - i.e.,
the so-called "vertical microcode" instruction set - and how much is
implemented in the "high-level" instruction set?

I.e., precisely how CISCy is the "vertical microcode" instruction set? I
don't particularly care how CISCy the "high-level" instruction set is -
Smalltalk bytecodes are probably somewhat "high-level", as may be the
internal bytecodes used by various language interpreters, but both can
be handled, these days, by non-"high level CISC" processors (both RISC
and CISC).