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Article #10245

Re: Instruction Scheduling

#10245
From: Randell Jesup
Date: Mon, 15 Apr 1991 07:39
32 lines
2136 bytes
In article <1991Apr10.131341.26357@b11.ingr.com> dclark@b11.ingr.com (Dave Clark) writes:
> Although I haven't (yet) seen an assembler that does
>optimizations, I have seen utilities that can optimize assembly
>code (part of an HOL compiler back-end).

	Actually, (somewhat) optimizing assemblers are by no means uncommon.
For example, the 680x0 assembler I use converts my lsl.l #1,Dn instruction
into add.l Dn,Dn for me (there are ones that do far more wide-ranging
optimizations, used as back-ends for compilers).

>One of the compilers I'm using actually does instruction reordering
>within the linker!

	That's the right place to do it!  If you have deep pipelines, being
forced to make worst-case assumptions at routine entry can be quite limiting.
By doing reorganization in (or after) the linker, you know all the pre-
conditions a routine will have to deal with (unless someone takes it's
address, of course - then you go back to worst-case, unless you have a VERY
smart and lucky linker).

	The RPM-40 backend team (which I was part of) made use of this
trick, since we had long pipelines and load-delays (plus load/store/bra
interlocks to worry about).  Libraries were supposed to be in effectively
source format.

-- 
Randell Jesup, Keeper of AmigaDos, Commodore Engineering.
{uunet|rutgers}!cbmvax!jesup, jesup@cbmvax.commodore.com  BIX: rjesup  
Disclaimer: Nothing I say is anything other than my personal opinion.
Thus spake the Master Ninjei: "To program a million-line operating system
is easy, to change a man's temperament is more difficult."
(From "The Zen of Programming")  ;-)
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Message-ID: <20632@cbmvax.commodore.com>
Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cbmvax!jesup
References: <32097@shamash.cdc.com> <1991Apr8.224717.14402@aero.org> <1991Apr10.131341.26357@b11.ingr.com>

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!rutgers!cbmvax!jesup
From: jesup@cbmvax.commodore.com (Randell Jesup)
Newsgroups: comp.arch
Subject: Re: Instruction Scheduling
Keywords: SPEC compilers CDC Mips
Message-ID: <20632@cbmvax.commodore.com>
Date: 15 Apr 91 07:39:35 GMT
References: <32097@shamash.cdc.com> <1991Apr8.224717.14402@aero.org> <1991Apr10.131341.26357@b11.ingr.com>
Reply-To: jesup@cbmvax.commodore.com (Randell Jesup)
Organization: Commodore, West Chester, PA
Lines: 32