🚀 go-pugleaf

In article <38139@stellar.UUCP> wright@sol.UUCP () writes:
....
>Honeywells were basically IBM ripoffs with a special Gray-to-binary
>instruction added so they could work on radars on the DEW line.
>They had some interesting features; not only did they have an
>execute (XEC) instruction that would execute the instruction at the
>effective address, they had execute double (XED) that would execute
>the two instructions starting at the effective address.  Since the
....
>
>The other feature I've not seen elsewhere was the repeat instruction.
>This had the effect of repeatedly executing the instruction following
>the repeat (RPT), or the two instructions following (RPD) up to 256
>times.  You could specify condition code settings that would end
>the iteration before the count ran out.  There was even repeat-link,
....

This is really great stuff for placing the usual RISC-vs-CISC
wars in better context: compared to some of the older mainframe
architectures, 80386s, 68Ks, even S/360s and VAXen are about as RISCy as
they come.
In fact, this leads to an interesting question for the old-timers:
how about more reminiscing of instruction-set-architecture features of the
machines designed in the 50s and 60s, that have essentially
disapeared in those designed in the 70s and 80s...?
-- 
-john mashey	DISCLAIMER: <generic disclaimer, I speak for me only, etc>
UUCP: 	{ames,decwrl,prls,pyramid}!mips!mash  OR  mash@mips.com
DDD:  	408-991-0253 or 408-720-1700, x253
USPS: 	MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086