Article View: comp.arch
Article #21255Re: Register usage
From: Tim Olson
Date: Mon, 15 May 1989 15:08
Date: Mon, 15 May 1989 15:08
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In article <8104@killer.Dallas.TX.US> elg@killer.Dallas.TX.US (Eric Green) writes: | (for one thing, the idea of kludging in | byte-fetch logic externally probably turned off potential system | designers). This is something that we have changed -- Revision 'C' Am29000's have fully-implemented byte and half-word loads and stores, with both signed and unsigned versions of loads. -- Tim Olson Advanced Micro Devices (tim@amd.com)
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Path: arc1-ca.pugleaf.net!utzoo!attcan!utgpu!jarvis.csri.toronto.edu!mailrus!purdue!gatech!amdcad!crackle!tim From: tim@crackle.amd.com (Tim Olson) Newsgroups: comp.arch Subject: Re: Register usage Message-ID: <25633@amdcad.AMD.COM> Date: 15 May 89 15:08:38 GMT References: <259@mindlink.UUCP> <8104@killer.Dallas.TX.US> Sender: news@amdcad.AMD.COM Reply-To: tim@amd.com (Tim Olson) Organization: Advanced Micro Devices, Inc. Sunnyvale CA Lines: 13