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Article #21534Re: DMA on RISC-based systems (SotA criteria)
From: Peter da Silva
Date: Fri, 02 Jun 1989 12:26
Date: Fri, 02 Jun 1989 12:26
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1154 bytes
In article <15809@vail.ICO.ISC.COM>, rcd@ico.ISC.COM (Dick Dunn) writes: > if it's going to make sense to have a separate bit-blitter, you have to be > able to set it up quickly. ... Even if the setup is fast, you have to be > able to do something useful with the CPU--which is likely to mean that you > have to be able to do a blazingly fast context switch... Which is not out of the question. There is plenty of room for improvement in this department in most operating systems (understatement of the century). -- Peter da Silva, Xenix Support, Ferranti International Controls Corporation. Business: uunet.uu.net!ficc!peter, peter@ficc.uu.net, +1 713 274 5180. Personal: ...!texbell!sugar!peter, peter@sugar.hackercorp.com.
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!jarvis.csri.toronto.edu!rutgers!cs.utexas.edu!sun-barr!texsun!texbell!sugar!ficc!peter From: peter@ficc.uu.net (Peter da Silva) Newsgroups: comp.arch Subject: Re: DMA on RISC-based systems (SotA criteria) Message-ID: <4385@ficc.uu.net> Date: 2 Jun 89 12:26:58 GMT References: <46500067@uxe.cso.uiuc.edu> <181@dg.dg.com> <15809@vail.ICO.ISC.COM> Organization: Xenix Support Lines: 13