🚀 go-pugleaf

Clearly it has to make some difference, given that the 680x0 processors
support auto-increment/decrement of address registers!  The PDP-11 had
the same problem.  I seem to recall they solved it by having a diagnostic
register in which the CPU wrote which registers had been incremented or
decremented and by how much.  That wasn't as bad as it might first seem.
There are only two registers which can change as a result of any given
instruction and they could only change by 1, 2 or 4.  It's been a while
since I hacked on a PDP-11, so I might be off a little here, but that
was the basic gist....  Maybe the 68040 does something similar?  It
certainly can't be any uglier than the sh*t the current processors have
with eight gazillion different types of fault frames which can change
incompatibly as the microcode is updated....