🚀 go-pugleaf

In article <3810030@nucsrl.UUCP> ram@nucsrl.UUCP (Renu Raman) writes:
>
>    The Japanese are tagging along with 32 bit machines:
>
>    This is some info for the interested:
>
>    1. From Electronics of Apr 16.
>
>	Japan's first microprocessor with 32-bit data and address buses
>	runs at a maximum rate of 6.6 MIPS - 4 MIPS is typical of 32-bit
>	chips(Roger,Brian,John - smile here).  Fabricated in 1.5um CMOS,
>	the NEC V70 has a dynamic bus sizing that enables it to match
>	input/output with 8,16, and 32 bit buses.  Its TRON (we are entering
>	space age) OS will make it shine in real-time control and robot
>	applications.  The 20MHz V70 also incorporates FP(!!) facilities
>	on-chip and has function redundancy monitor for fault-tolerant
>	computing.  Sample prices of the device is $687.52.  Prices
>	will be lower for production quantities.
>
>    The spec on FP on-chip is rather confusing.  I doubt if a hardware
>    FP unit exists on chip.  ANy clarifications?  Also, will it be
>    compatible with iAPX386 :-).

I have  some preliminary specs on the V70 and I quote:

	"On-Chip Floating Point Support
		- IEEE 32 and 64-Bit Data Types"

It also includes:
	
	On-Chip MMU
	On-Chip instruction and data cache

I wonder when we will see On-Chip Hard disk ;-} ?

The V-70 looks like a hell-of-a-chip.  Some other misc. hype:

	- 32 General Registers ( all 32 bits of course )
	- Symmetric Instruction Set
	- 20 Addressing modes
	- Variable Byte Length Format
	- Virtual Memory
		4.3 GB Virtual Space / task
		2 level paging
		16 Entry Full Association 

It's not iAPX386 compatible, this looks like a NICE architecture!!

--geo

Opinions??  Yeah, I have that in my car; Rack and Opinion Steering.-- 
-----
george aguiar	< UUCP: necis!geo >