🚀 go-pugleaf

In article <2050@kuling.UUCP>, rolande@kuling.UUCP (Roland Eriksson) writes:
...
> IMHO the main advantage that RISC arcitechtures has over CISC
> is that register operations are faster than memory operations
> and that the compiler writer do not know good ways to use the
> more complex ones of the instructions of a CISC processor. This
> is NOW. Whe have "only" about 1 miljon transistors in the most
> complex processors today (RISC or CISC). But we will soon have
> fabrication techniques to produce chips with 10 miljon transistors.

Debating RISC vs CISC on this basis misses one of the most important
factors governing RISC/CISC performance.  One of the original features
of RISC technology was the speed with which a design could be created
and implemented.  Since the implementation technology has to be frozen
at some point in the design cycle (I presume fairly early on) this
means that performance of the implementation is inversely proportional
to the time it took to produce it.  CISC machines take longer than
RISC machines, so currently available CISC chips necessarily use older
technology.

At present, hardware improves at a dizzying pace.  This means that
RISC chips have an inherent advantage.  Unfortunately exponential
growth never continues indefinitely.  Eventually RISC will lose the
implementation advantage over CISC.  At that point, my guess is that
architectures will end up sort of in the middle; i.e. more features
than RISC, less than current CISC.

-- 
  Terry Ingoldsby                ingoldsb%ctycal@cpsc.ucalgary.ca
  Land Information Services                 or
  The City of Calgary       ...{alberta,ubc-cs,utai}!calgary!ctycal!ingoldsb