Algorithms for phase locked loop?

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Article #1158

#1158

From: xaandrews
Date: Tue, 04 Dec 1990 12:32

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        Has anyone got an algorithm for implementing a phase locked loop on a
digital signal processor?
 
        I am using a DSP-32C DSP chip from AT&T.
 
        Thanks in anticipation.
 
        David Hichens.
        --------------

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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!munnari.oz.au!sirius.ucs.adelaide.edu.au!levels!xaandrews
From: xaandrews@levels.sait.edu.au
Newsgroups: comp.dsp
Subject: Algorithms for phase locked loop?
Message-ID: <15731.275b9752@levels.sait.edu.au>
Date: 4 Dec 90 12:32:18 GMT
Organization: Sth Australian Inst of Technology
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