🚀 go-pugleaf

	I have a question about the TMS320C25.  I am trying to make a digital
equalizer and I need to know if this thing is going to be fast enough for
my purposes.

	Now then, the tech. data on the C25 says that the maximum input clock
frequency is 40 MHz.  Ok.  Then if I was sampling at 44.1 kHz, I should have
about 900 or so clock cycles to play around with between each sample.  However,
I am confused.  In my data book, it says that the minimum "cycle" time for the
MACD instruction is 3 "cycle"s assuming that everything is in the on-chip
RAM.  However, at the beginning of the tch. reference, it says that the
instruction cycle time is 100 ns.

	My question is, does the "cycle" time referenced above refer to 100ns
or does it refer to 25ns (period of 40 MHz clock)?

	Thanks.

					-Trey

wwn8108@tamsun.tamu.edu
Electrical Engineering Dept
Texas A&M University