🚀 go-pugleaf

I'm looking at three chips.

	56156    @ 33ns/instruction
	320c50   @ 35ns/instruction
	dsp1610  @ 25ns/instruction

Has anyone done a comparative analysis of these three chips?  It's pretty tough
to determine which of these would be best.  For instance, just yesterday I 
noticed that an external write on a c50 takes two cycles and if a read precedes the
write, the write takes 3 cycles.  This is a pretty serious hit if you need to do
a lot of memory accesses.  This jucy peice of information is not listed in the data
book at all until you get to the wayyyyyyy back where the timing diagrams are and you
look at the smalllllllll print.  This penalty doesn't exist in the C25 becuase this part uses a two-phase clocking scheme and an entire read or write cycle can be performed within the boundaries of a single clock cycle.  The c50 operates at the
boundaries.

It looks like the 1610 does not suffer from this problem, but I have not gotten very
far along in my analysis of this part.  I haven't seriously looked at the 56156, yet.

Thanks for any insight.
-mike