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Article #1905Re: Motorola's gcc diffs?
From: G.R. Basile
Date: Mon, 28 Dec 1992 15:54
Date: Mon, 28 Dec 1992 15:54
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moshier@world.std.com (Stephen L Moshier) writes: > The one I tried is called Version 1.03. When you try to compile > something with it, it bombs when it gets to the point of looking > for the non-existent optimizer. The illegal instruction sequences > include using an address register on the instruction after loading it, > and doing a subroutine return on the instruction after modifying > the system stack (i.e. popping the status). This little problem has been around since Motorola introduced their first C compiler ( which by the way, had so many bugs it was practically useless). The problem can be solved by adding nops after the register loads and system stack modifies. The Motorola assembler will add the nops automatically if you use the -c switch. I have yet to play with GNU stuff. Does anyone know why the compiler does not add the nops? Greg Basile greg@gmp.lonestar.org
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Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!sun-barr!news2me.EBay.Sun.COM!cronkite.Central.Sun.COM!texsun!wb9rxw!kf5iw!gmp!greg From: greg@gmp.lonestar.org (G.R. Basile) Newsgroups: comp.dsp Subject: Re: Motorola's gcc diffs? Message-ID: <R12HwB1w164w@gmp.lonestar.org> Date: 28 Dec 92 15:54:02 GMT References: <BzvJAM.H8C@world.std.com> Organization: GMP Research Co., Dallas TX Lines: 21