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Article #69Re: 56K vs. c50 vs. dsp1610, write cycle timingss
From: Mike Gore
Date: Sun, 02 Aug 1992 01:35
Date: Sun, 02 Aug 1992 01:35
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In article <l7duqeINN8gr@male.EBay.Sun.COM> miket@beav.EBay.Sun.COM writes: [Re: clock cycles to external RAM of various DSP's] Speaking of manuals with obscurely located information. I have been using the 56k for a short while and have yet to see how one can write port B or external RAM in 2 clock cycles. If anyone could offer some insight I would be most interested. 4 cycle example movep Y:(r0)+,X:M_PBD [ Please respond by email - I'll summerize any replies ] Thanks # Mike Gore, Technical Support, Institute for Computer Research # Phone: 1-519-885-1211, x6205 # Fax: 1-519-885-1208 # Internet: magore@watserv1.waterloo.edu or magore@watserv1.uwaterloo.ca # UUCP: uunet!math!watserv1!magore
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Newsgroups: comp.dsp Path: arc1-ca.pugleaf.net!sparky!uunet!cs.utexas.edu!torn!watserv2.uwaterloo.ca!watserv1!icr2.uwaterloo.ca!magore From: magore@icr2.uwaterloo.ca (Mike Gore) Subject: Re: 56K vs. c50 vs. dsp1610, write cycle timingss Message-ID: <BsC1rw.B63@watserv1.uwaterloo.ca> Sender: news@watserv1.uwaterloo.ca Organization: University of Waterloo References: <l7duqeINN8gr@male.EBay.Sun.COM> Date: Sun, 2 Aug 1992 01:35:55 GMT Lines: 21