C cross compiler's for TMS320XX chips

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2 total messages Started by Donald McLachlan Tue, 12 Feb 1991 15:51

#1464

Author: Donald McLachlan
Date: Tue, 12 Feb 1991 15:51

13 lines
849 bytes

We have used TI's TMS320C25 C compiler, and are not impressed with the
code it produces. Often hand assembled code is 8 time better, on average
3. In CISC environments I always heard a good C compiler would give
at most 50% overhead. What are reasonable numbers for RISC or DSP chips.

If anyone can suggest a better C cross compiler for the TMS320XX family
we would certainly like to hear about it.

Thanks, Don.

P.S.
	Developement host would be a PC or better yet a Sun.

Re: C cross compiler's for TMS320XX chips

#1474

Author: Bob Geer
Date: Wed, 13 Feb 1991 14:09

20 lines
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don@dgbt.doc.ca (Donald McLachlan) writes:
>We have used TI's TMS320C25 C compiler, and are not impressed with the
>code it produces. Often hand assembled code is 8 time better, on average
>3. In CISC environments I always heard a good C compiler would give
>at most 50% overhead. What are reasonable numbers for RISC or DSP chips.

>If anyone can suggest a better C cross compiler for the TMS320XX family
>we would certainly like to hear about it.

Version 4.0 of TI's TMS320C30 C compiler has a much better optimizer
than vers. 3; it makes fuller use of registers & improves inner loop
code quite a bit.  Cursory measurements I've done show marked
improvement in our code but don't have publishable numbers yet.  I
don't know if TI has improved the _C25 compiler's optimizer as well,
but it would be worth a look-see.
-- 
<> Bob `Bear' Geer <>               bgeer@javelin.sim.es.com              <>
<>      Alta-holic <>   speaking only for myself, one of my many tricks   <>
<> Salt Lake City, <>    "We must strive to be more than we are, Lal."    <>
<>          Ootah  <>           -- Cmdr. Data, learning schmaltz          <>

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