Thread View: comp.dsp
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2 total messages
Started by Tom Erbe
Wed, 16 Dec 1992 07:31
DSP56001 and CS4215
Author: Tom Erbe
Date: Wed, 16 Dec 1992 07:31
Date: Wed, 16 Dec 1992 07:31
12 lines
670 bytes
670 bytes
Has anyone connected these two chips? As I am under a deadline, I would be forever indebted to anyone who could share their experiences with me. DSP or psuedo code would be very appreciated. thank you, thank you -- tom erbe ccm - mills college 5000 macarthur blvd. oakland, ca 94613
Re: DSP56001 and CS4215
Author: Jarkko Vuori
Date: Thu, 17 Dec 1992 18:12
Date: Thu, 17 Dec 1992 18:12
80 lines
3370 bytes
3370 bytes
In <1gmm0kINNm8t@agate.berkeley.edu> tom@mills.edu (Tom Erbe) writes: >Has anyone connected these two chips (DSP56001, CS4215)? >As I am under a deadline, I would be >forever indebted to anyone who could share their experiences with me. DSP >or psuedo code would be very appreciated. CS4215 connects very neatly to DSP56001. The software is a little tricky if you want high-performance 16-bit fast-interrupt based data transfer. Look the source code sample below. Jarkko Vuori Jarkko.Vuori@hut.fi ----------------------------------------------------------------------- ; SSI transmitter interrupt ;(because syncronous mode, we can use the same interrupt for both reading and writing) org p:i_ssitd movep y:(r7)+,x:m_tx movep x:m_rx,x:(r7) ;**************************** ;* Open codec driver * ;**************************** ; Start-up Crystal CS4215 Codec ; r7 - address of the modulo buffer (x: A/D, y: D/A) ; m7 - lenght of the modulo buffer ; x0 - samping rate: ; 8 kHz $000000 ; 9.6 kHz $003800 ; 16 kHz $000800 ; 27.42857 kHz $001000 ; 32 kHz $001800 ; 48 kHz $003000 ; ; ; program SSI to handle Crystal's initial communication mode opencd movep #$4f05,x:m_cra ; 16-bit, 16 frames movep #$3b3c,x:m_crb ; generate SCLK and FS movep #$01e3,x:m_pcc ; TXD,RXD,SC2,SCK,SRD,STD movep #$001c,x:m_pcddr ; SCLK,SC0,SC1 as output movep #$0000,x:m_pcd ; PDN down (wake up Crystal) ; send control blocks to the Crystal until we get valid responce from it move y:<cryconf,a1 ; add sampling rate info to configuration block or x0,a #cryconf,r0 move a1,y:<cryconf move #4-1,m0 wakeCry jsr outblk ; send control info until CLB is low jset #2+16,x:tmpblk+2,wakeCry ; Crystal is configured, send final control block bset #2+16,y:<cryconf+0 ; set CLB high do #10,confok ; at least two frames after CLB high jsr outblk ; and ensure that at least 50 ms elapsed after leaving from PDN state nop ; reset and reprogram SSI again because we will get clock and frame signals from Crystal confok movep #$0003,x:m_pcc ; SRD,STD movep #$4305,x:m_cra ; 16-bit, 4 frames movep #$3b0c,x:m_crb ; receive SCLK and FS movep #$01e3,x:m_pcc ; TXD,RXD,SC2,SCK,SRD,STD ; then start data transfer and synchronize to it movep #$0010,x:m_pcd ; D/C high (switch Crystal to data mode) waitsyn jclr #m_tde,x:m_sr,waitsyn ; wait for the frame sync jset #m_tfs,x:m_sr,frmsync movep x:m_rx,x:m_tsr jmp waitsyn frmsync do #4-1,flshfrm ; then get rid of the remaining data _loop jclr #m_tde,x:m_sr,_loop movep y:(r7)+,x:m_tx movep x:m_rx,x:(r7) flshfrm movep #$7b0c,x:m_crb ; enable transmit interrupts rts
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