🚀 go-pugleaf

>Really?  Ever heard of the MVS assists "OBTAIN LOCAL LOCK", "ADD FRR",
>etc.?  These are (microcoded) instructions which are sensitive to the
>format of MVS control blocks.  Look in the MVS Data Areas manual (or
>whatever it's called for your release of MVS.)  In some control blocks
>like the ASCB, there are fields marked "this offset fixed by
>architecture".  What could that possibly mean except that there are
>machine instructions that manipulate those control blocks?

Leonard, I think you are splitting hairs here, that kind of assist
"instruction" is really just a subroutine of the operating system that IBM
has decided to make faster by implementing in microcode.  They know a lot
about the operating system in question and as you noted, they can modify
control blocks of that operating system.  However, to call them "instructions"
seems to be going a bit far.  At least in the VM world, the ECPS microcode
assists are just subroutines from CP that have been placed in microcode
for speed.  In CP, generally this "instruction" is at the entry point of
a subroutine and if active and capable of handling the request, does all
the processing including the return to caller.  If the assist isn't
available on the processor, CP NOPs these "instructions" and control is
passed to the actual subroutine that immediately follows the assist
"instruction".  IUCV is implemented using funky op-codes too, originally
this just caused an illegal instruction trap, but now on some processors
there exists microcode assists for IUCV too.

                                       Bruce