🚀 go-pugleaf

Hmmm... And I thought that the 360/91 was the only machine that had
those blasted imprecise interrupts.  NOPR ^0 was a special
implementation that flushed the pipeline, so that you could isolate
instructions that were causing S0C0s.

I once had a program get an S0C0 on the LR at the top of a loop:
  LOOP  LR  R1,R2
        ...
        ...
        ST  R3,0(,R4)
        B   LOOP
It turned out to be the ST that was bad!!!

I haven't read Functional Characteristics for newer machines as
carefully as I read the one for the 360/91, and it seems that they
don't have as much detail as that one did, but I get the idea that no
machine since the 91 has the same sophisticated parallelism and
pipelining.  The 91 had 3 fixed point execution units, and 4 floating
point execution units.  The number of cycles listed for a floating
point add, substract, or load register (etc) was zero!  The 91 could
actually count in floating point faster than in fixed point.

Assembler programming on the 91 was interesting.  To get the maximum
performance out of the machine, we would use strange instruction
sequences like
   S    R1,aaa
   ST   R0,xxx
   BNP  wherever
instead of putting the ST in front of the S, because the BNP had to
wait for the results of the S, so we could give the machine something
else to do while waiting for the S to complete.

Also, the 91 would follow *both* forks in a branch instruction, and
then discard the results of the unsuccessful direction.  I don't know
how it avoided S0C0s down the unsuccessful path...

Since the 91 didn't have decimal instructions except for CVB, CVD, ED,
and EDMK, it was a long time before I learned to use things like AP.
I still resist them.


/Leonard

P.S.
> ... {quote about imprecise interrupts} ...
> (from the 360/65 functional characteristics manual).

So I'm not the only who keeps some old manuals for their historical
value.  I wonder where my 360/20 F.C. is...