🚀 go-pugleaf

peter@ficc (Peter da Silva) writes:
] (for comp.arch folks, Jim is basically saying that the more registers you
]  have, the better, because it lets you put more variables in registers)
] 
] But, Jim, registers aren't free. The more registers you have the more bits
] you have to hide in your carefully crafted instruction set ...
] ... Now suppose you have room on the chip for 512 registers... why *not*
] use register windows, or a stack cache ... instead of just making the
] instruction wider?

There are of course other costs that come with lots of registers :

    Unexpected Context Switch times : goes up, since you have more
    CPU state to save. If you know the context switch is coming (like
    before a call to a kernal "WAIT_FOR_SIG" entry) you can decrease
    this penalty. On some kinds of interrupts, you may not be able to.

    Processor Speed : more registers means more loading on the
    internal processor busses, and it means these busses are longer.
    So you get more capacitance, and higher resistance in the lines.
    So your busses get slower. If the busses are not part of a critical
    path, you're okay. But eventually, as you add more registers,
    your busses will become part of a critical path.

This last effect was a major point of RISC (vs. CISC) design philosophy :
generally, you can't tack more stuff onto a circuit without possibly
slowing it down. So you should be able to show a definate performance
improvement to justify a potential slowing of the clock rate.

Some big-register-set opponents ( big >> 32 ) argue that the supporters
of this idea haven't conclusively demonstrated any such improvement.
--
  Dennis O'Connor      OCONNORDM@CRD.GE.COM      UUNET!CRD.GE.COM!OCONNOR
  "Let's take a little off the top ... a bit off the sides ...
    trim the back a bit ... Surprise ! You've been bald-ed !"