🚀 go-pugleaf

In article <810267632.AA09453@puddle.fidonet.org>
           Marco.van.de.Voort@p18.f402.n284.z2.fidonet.org
           "Marco van de Voort" writes:

Hi Marco,

#if optimize(cpu)="n86"  solves the original request

Thanks are due to one of Mark's ex-Clarion friends.

> Saturday August 26 1995 13:19, Martin Tom Brown wrote to All:
> 
> I have some processorspecific code(386+), e.g in the detection of the
>  processortype, and it's an ugly bunch of db's, and the disassembler can't
>  handle it.

You can annotate it well enough next to the code so it's not *too* ugly.
Reminiscent of the old CODE() statement for inline ASM in Logitech M2.
Padding with a few trailing NOPs might help disassembly get in step.

> The *REAL* problem is the lack of mnemonics-opcode support of the assembler,
>  does anybody found the lists of mnemonics opcodes in a textfile?

A somewhat boring message follows but these are the mnemonics,
coincidentally in the same order as they appear in TSASM.DLL ;-)

ror rcl rcr shl-sal shr sar int into iret 
daa das aaa aas aam aad lea xlat-xlatb add or adc sbb and sub 
xor cmp loopne-loopnz loope-loopz loop jcxz in+out+ call jmp 
not neg mul imul div idiv lock+repne-repnz repe-repz-rep hlt 
cmc+nop clc stc cli sti cld std 
f2xm1 fabs fadd faddp fbld fbstp fchs fclex fcom fcomp fcompp 
fdecstp fdiv fdivp fdivr fdivrp ffree fiadd ficom ficomp fidiv 
fidivr fild fimul fincstp finit fist fistp fisub fisubr fld fldcw 
fldenv fld1 fldl2e fldl2t fldlg2 fldln2 fldpi fldz fmul fmulp 
fpatan fprem fptan frndint frstor fsave fscale fsqrt fst fstcw 
fstenv fstp fstsw fsub fsubp fsubr fsubrp ftst fwait fxam fxch 
fxtract fyl2x fyl2xp1 foption

And these register directives:

 byte db dd dw dword 

I don't see the lack of mnemonic support as much more than an
irritation but it depends what you are trying to do. YMMV

Hope this helps.
Regards,
-- 
Martin Brown  <martin@nezumi.demon.co.uk>     __                CIS: 71651,470
Scientific Software Consultancy             /^,,)__/