VHDL models of Phase-Locked Loops

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Article #357

#357

From: Simon Curry
Date: Tue, 28 May 1991 21:59

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Does anyone have VHDL (Behavioural) models of Phase-Locked Loops. I
know that VHDL PLL models were successfully tried out at IBM, but have
no idea who was responsible.


--
Simon Curry     Bell-Northern Research Ltd, Stop 49   Ph.: (613) 763-2981
VHDL Tools          P.O. Box 3511, Station C          Fax: (613) 763-7241
                  Ottawa, Ontario, Canada, K1Y 4H7  Flame: 1-800-DEV-NULL
curry@bnr.ca                      library disclaimer; use disclaimer.all;

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Message-ID: <1991May28.215959.28102@bnr.ca>

Path: arc1-ca.pugleaf.net!utzoo!utgpu!cunews!bnrgate!bcrka451!bcrkd11!curry

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Newsgroups: comp.lang.vhdl
Path: arc1-ca.pugleaf.net!utzoo!utgpu!cunews!bnrgate!bcrka451!bcrkd11!curry
From: curry@bcrkd11.bnr.ca (Simon Curry)
Subject: VHDL models of Phase-Locked Loops
Message-ID: <1991May28.215959.28102@bnr.ca>
Keywords: PLL, Phase-Locked, VHDL
Sender: curry@bcrkd11
Reply-To: curry@bnr.ca
Organization: Bell-Northern Research, VHDL Group
Date: Tue, 28 May 91 21:59:59 GMT