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Article #371VHDL benchmark cases needed
From: Dr. Shantanu Ganguly
Date: Thu, 06 Jun 1991 21:14
Date: Thu, 06 Jun 1991 21:14
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Do any VHDL benchmark circuits exist that one could use to test the performance of a VHDL simulator ? (something on the lines of Deutsch's Difficult Example for Channels or the ISCAS examples) Please send mail to sganguly@cat.syr.edu, I will summarize. Thanks, Shantanu Ganguly Syracuse University
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arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!rpi!uupsi!rodan.acs.syr.edu!sgangulyShow Full Headers
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Path: arc1-ca.pugleaf.net!utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!rpi!uupsi!rodan.acs.syr.edu!sganguly From: sganguly@rodan.acs.syr.edu (Dr. Shantanu Ganguly) Newsgroups: comp.lang.vhdl Subject: VHDL benchmark cases needed Keywords: VHDL, benchmark Message-ID: <1991Jun6.211406.10848@rodan.acs.syr.edu> Date: 6 Jun 91 21:14:06 GMT Sender: sganguly@rodan.acs.syr.edu (Shantanu Ganguly) Organization: Syracuse University, Syracuse, NY Lines: 12