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Article #390

MVL7 vs MVL10 or anything

#390
From: Mark Pulver
Date: Thu, 27 Jun 1991 00:34
65 lines
2575 bytes
My company is new in the world of VHDL, but intend to have it
replace our in house language.
Is there a standard for 'signal representation'?
Our  first exposure to VHDL is through Sysnopsys. 
They ofter us an MVL7 logic:

The MVL7 type is defined as follows:

`X'	Strong X (strong unknown)
`0'	Strong 0 (strong low)
`1'	Strong 1 (strong high)
`W'	Weak X (weak unknown)
`L'	Weak 0 (weak low)
`H'	Weak 1 (weak high)
`Z'	Tristate X (high impedance)

When an MVL7 signal has a certain value, and is driven with another
value, the resultant value is determined by the following table:

	`X'	`0'	`1'	`W'	`L'	`H'	`Z'
`X'	`X'	`X'	`X'	`X'	`X'	`X'	`X'
`0'	`X'	`0'	`X'	`0'	`0'	`0'	`0'
`1'	`X'	`X'	`1'	`1'	`1'	`1'	`1'
`W'	`X'	`0'	`1'	`W'	`W'	`W'	`W'
`L'	`X'	`0'	`1'	`W'	`L'	`W'	`L'
`H'	`X'	`0'	`1'	`W'	`W'	`H'	`H'
`Z'	`X'	`0'	`1'	`W'	`L'	`H'	`Z'

But this MVL7 does not allow for us to simulate node capacitance.  You
can fake it by using a weak signal, but then you can not tell the difference
between a capacitive value, and a pull up/down (which could also
have to be weak).

Without thinking too deeply on the matter (ie. worrying about
implementation issues), I beleive we need a MVL10:
`X'	Strong X (strong unknown)
`0'	Strong 0 (strong low)
`1'	Strong 1 (strong high)
`W'	Weak X (weak unknown)
`L'	Weak 0 (weak low)
`H'	Weak 1 (weak high)
`A'	Capacitive 0
`B'	Capacitive 1
`C'	Capacitive X
`Z'	Tristate X (high impedance)

Where A,B,C can not be driven on a node, but a node will get retain of these
values if all drivers are removed from it and the node is defined to
have capacitance.

Your evaluation table above is still correct, but extended

	`X'	`0'	`1'	`W'	`L'	`H'	`Z'
`X'	`X'	`X'	`X'	`X'	`X'	`X'	`X'
`0'	`X'	`0'	`X'	`0'	`0'	`0'	`0'
`1'	`X'	`X'	`1'	`1'	`1'	`1'	`1'
`W'	`X'	`0'	`1'	`W'	`W'	`W'	`W'
`L'	`X'	`0'	`1'	`W'	`L'	`W'	`L'
`H'	`X'	`0'	`1'	`W'	`W'	`H'	`H'
`A'	`X'	`0'	`1'	`W'	`L'	`H'	`A'
`B'	`X'	`0'	`1'	`W'	`L'	`H'	`B'
`C'	`X'	`0'	`1'	`W'	`L'	`H'	`C'
`Z'	`X'	`0'	`1'	`W'	`L'	`H'	`Z'

(A,B,C are only in one axis because they can not be driven)
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From: mpulver@clapton.austek.oz (Mark Pulver)
Newsgroups: comp.lang.vhdl
Subject: MVL7 vs MVL10 or anything
Keywords: standard?
Message-ID: <109@clapton.austek.oz>
Date: 27 Jun 91 00:34:18 GMT
Organization: Austek Microsystems, Adelaide, South Australia
Lines: 65