🚀 go-pugleaf

In-Reply-To: <1992Dec21.155528.26802@sol.asl.hitachi.com> lap@sol.asl.hitachi.com (Larry Pearlstein)

I think it that you should use the most abstract types which your
synthesiser can handle.  The synthesiser I use can work out the
'used' range of an INTEGER and allocate the appropriate number of
bits.  For boolean logic, I would use an MVL type and compare it to
'1' or '0' in the 'if' statement.  I would avoid the use of BOOLEAN
for things which will be synthesised.

If you are going to write structural or low-level VHDL yourself, and
look for timing glitches, then you need to use an MVL system for
almost everything.  I'm sure that VHDL is best used by writing code
at a high level or abstraction, not thinking how every gate will look
in the chip - otherwise its just a netlist in a posh accent!
        -- John Messenger, Clifton Advanced Technology,
        -- jmessenger@cix.compulink.co.uk
--
    John Messenger (jmessenger@cix.compulink.co.uk) Tel: +44 904 692700