Article View: comp.lang.vhdl
Article #421Re: Overload Resolution (Was: type conversion and configuration)
From: Gary Beihl
Date: Fri, 08 Jan 1993 16:21
Date: Fri, 08 Jan 1993 16:21
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In article <DANIEL.93Jan6115749@algol.clsi.COM> daniel@clsi.COM (Daniel S. Barclay) writes: >would it make a difference? Aren't Sunder's comments correct: > > "The first one when indexed gives you an element of std_ulogic, and > the latter gives std_logic. Now, std_logic is a subtype of std_ulogic, > which implies both have the same base type which is std_ulogic." > >What seemed to "narrow the search to a single choice"? > Sunder and Daniel are correct. I had somehow (temporarily) convinced myself that the subtype of the default expression had to match the subtype indication of the interface object. After re-reading the LRM and the previous posts, I'm now in agreement that the original code is ambiguous. Gary Beihl (gary.beihl@columbiasc.ncr.com)
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Newsgroups: comp.lang.vhdl Path: arc1-ca.pugleaf.net!sparky!uunet!europa.asd.contel.com!gatech!hubcap!ncrcae!ncrcol.ColumbiaSC.NCR.COM!beihl From: beihl@ncrcol.ColumbiaSC.NCR.COM (Gary Beihl) Subject: Re: Overload Resolution (Was: type conversion and configuration) Message-ID: <1993Jan08.112100.22886@ncrcae.ColumbiaSC.NCR.COM> Nntp-Posting-Host: linville.columbiasc.ncr.com Organization: NCR E&M Columbia SC. References: <1993Jan4.225957.26359@viewlogic.com> <1993Jan05.101254.26831@ncrcae.ColumbiaSC.NCR.COM> <DANIEL.93Jan6115749@algol.clsi.COM> Date: Fri, 08 Jan 93 16:21:00 GMT Lines: 18