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Started by Sri Parameswaran
Sun, 14 Mar 1993 04:20
Hardware Description Language Conference
Author: Sri Parameswaran
Date: Sun, 14 Mar 1993 04:20
Date: Sun, 14 Mar 1993 04:20
91 lines
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5495 bytes
First Call for Papers First Asia Pacific Conference on Hardware Description Languages, Standards and Applications December 6-8, 1993, Brisbane, Queensland, Australia The Conference APCHDLSA is an international conference intended to bring together the research and commercial community members working in the area of Hardware Description Languages. This conference addresses all aspects of the discipline, including synthesis, modelling and simulation. The General Chair of the conference will be jointly held by Jean Mermet and Adam Postula. This conference is held in co-operation with IEEE and IFIP WG10.2. Programme Committee Program chair: R.Camposano, vice-chair: V.Berman P. Ashenden (Adelaide - Aus) V. Berman (Cadence - USA) N. Bergman (CSIRO - Aus) D. Borrione (IMAG - France) R. Camposano (GMD - Germany) B. Courtois (IMAG - France) N. Dutt (UCI - USA) M. Fuita (Fujitsu - Japan) G. Heinze (Telecom -Aus) G. Hellestrand (UNSW - Aus) A. Hemani (IM- Sweden) A. Hohl (Siemens - Germany) M. Imai (Toyhashi - Japan) N. Ishiura (Osaka -- Japan) N. Kawato (Fujitsu - Japan) S. Krolikoski (CLSI - USA) N. Maeda (NEC - Japan) J. Mermet (CNRS - France) S. Parameswaran (UofQ -Aus) A. Postula (Griffith- Aus) R. Sadananda (AIT - Thai) G. Saucier (Grenoble - France) M. Schulz (UofQ -- Aus) M. Shahdad (Viewlogic - USA) T. Sudo (NTT -- Japan) A. Takahara (NTT -- Japan) Y. Tohma (TIT - Japan) E. Villar (Cantabria -- Spain) A. Yamada (NEC - Japan) H. Yasuura (Kyushu - Japan) Tutorials The tutorials will precede the technical programme and will provide in-depth introduction to a variety of issues pertinent to Hardware Description Languages and Standards. Contributions Original papers for oral and poster presentations are invited from the areas related to HDL theory and Applications. The topics to be covered include, but are not limited to, Synthesis, Simulation, Modelling, Applications, Design Methodology, Formal Methods, Analogue simulation and synthesis, Test and Maintenance of Designs, Mixed-Mode Simulation,Interoperability of Standards, Integration of HDL based tools in CAD frameworks and Design experience with HDLs. Extended abstracts of contributions should be submitted to the conference secretariat by post or email meeting the deadline. E-mail submissions can be in ASCII, LATEX or Postscript formats. Authors should give their affiliation, postal address, telephone, fax and e-mail. The abstracts should be not longer than 1000 words, clearly stating what the significance of the contribution is. Preferable form of presentation - oral paper or poster should be indicated. Oral paper presentation time is 20 minutes. Posters will be presented for 5 minutes in a common poster session and displayed permanently, allowing longer discussions with those interested. The programme committee reserves the right to qualify the contribution as a poster even if authors suggested an oral presentation. Full papers of contributions accepted for presentation will be required. The regular paper length is limited to 12 A4 pages including diagrams and references. Poster abstracts will also be included in the proceedings and their length is limited to 3 A4 pages. Due date for receipt of extended abstracts June 5, 1993 Notification of Acceptance July 31, 1993 Due date for camera ready copy for inclusion in Proceedings September 15, 1993 Those intending to contribute should submit the extended abstract on A4 pages to: Dr. Sri Parameswaran, Department of Electrical and Computer Engineering, University of Queensland, Qld 4072, Australia. E-mail: sridevan@s1.elec.uq.oz.au General Enquiries may also be directed to Sri Parameswaran at the Department of Electrical and Computer Engineering, University of Queensland Tel: +61-7-365-4190. -- Sri Sri Parameswaran Dept. of Electrical & Computer Engineering, University of Queensland, Australia. Phone:+61-7-365-4190 Fax:+61-7-365-4999 INTERNET: sridevan@s1.elec.uq.oz.au
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