Thread View: comp.lang.vhdl
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Started by ThomasKropf
Wed, 23 Nov 1994 09:50
IFIP Verification Benchmark Circuits
Author: ThomasKropf
Date: Wed, 23 Nov 1994 09:50
Date: Wed, 23 Nov 1994 09:50
35 lines
2595 bytes
2595 bytes
The IFIP WG10.2 Verification Benchmark Circuits Set is intended to provide people working in the domain of formal methods in circuit design with possibilities to evaluate their approaches and to relate own research results to those of others. The benchmark set is supported by IFIP WG10.2. and is currently maintained by Joergen Staunstrup, Lyngby University, Denmark and Thomas Kropf, University of Karlsruhe, Germany. The benchmark documentation and descriptions of the circuits are available via WWW and ftp: http://goethe.ira.uka.de/benchmarks/ ftp://goethe.ira.uka.de/pub/benchmarks/ After the initial presentation of the circuits at TPCD94 (2nd International Conference on Theorem Provers in Circuit Design, Bad Herrenalb, September 1994) the benchmark set will be revised and substantially improved. If you want to suggest changes or additions, which should be considered during the revision process, then you are encouraged to send your comments to kropf@informatik.uni-karlsruhe.de or to use the feedback form provided on the WWW pages. -------------------------------------------------------------------------------- If you want to be notified by email about future changes and updates in the benchmark set, then send a brief email to kropf@informatik.uni-karlsruhe.de. -- Thomas Kropf Institut fuer Rechnerentwurf und Fehlertoleranz Universitaet Karlsruhe, Zirkel 2, Geb. 20.20, D-76128 Karlsruhe, Germany email: kropf@ira.uka.de, http://goethe.ira.uka.de/people/kropf/kropf.html FAX: +49 721 370 455 Tel.: +49 721 608 4220
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