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Verilog To VHDL translator
From: Hojjat Salemi
Date: Tue, 12 Jan 1993 20:21
Article: 430
Message-ID: <1993Jan12.202143.6794@bmerh85.bnr.ca>
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- Subject: Verilog To VHDL translator
- From: Hojjat Salemi
- Date: Tue, 12 Jan 1993 20:21
- Article: 430