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Article #671Why no tri-state outputs in FPGA cells?
From: Pichet Chintrakulchai
Date: Mon, 14 Dec 1992 22:15
Date: Mon, 14 Dec 1992 22:15
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Hello, I've been working on a project designing a processor with FPGA's. One severe limitation I found is that their cells do not have tri-state outputs and thus forcing me to use MUXes on buses consuming a lot of the resources. Does anybody have any idea why they didn't make these cell outputs tri-state? Thanks. Pichet Chintrakulchai (pichet@dartmouth.edu)
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Path: arc1-ca.pugleaf.net!sparky!uunet!think.com!paperboy.osf.org!hsdndev!dartvax!coos.dartmouth.edu!pichet From: pichet@coos.dartmouth.edu (Pichet Chintrakulchai) Newsgroups: comp.lsi.cad,comp.arch Subject: Why no tri-state outputs in FPGA cells? Message-ID: <1992Dec14.221541.25270@dartvax.dartmouth.edu> Date: 14 Dec 92 22:15:41 GMT Sender: news@dartvax.dartmouth.edu (The News Manager) Organization: Dartmouth College, Hanover, NH Lines: 10 Originator: pichet@coos.dartmouth.edu