Article View: comp.lsi.cad
Article #688Looking for benchmark suite for circuit simulators
From: Chih-Po Wen
Date: Fri, 18 Dec 1992 07:02
Date: Fri, 18 Dec 1992 07:02
33 lines
1511 bytes
1511 bytes
Hi, I am working on a parallel timing simulator on the CM5 multiprocessor. A prototype is working now, giving speedups up to over 50 for some MOS circuits on a 64-procesor CM5. While the speedup numbers are quite nice-looking, I have no idea what they mean to the community of users of timing simulators -- the speedup is certainly program and machine dependent. Is there a standard benchmark suite around that can help me to validate my work (in terms of absolute running time)? The only thing that comes close to that is the "ISCAS benchmark suite". However, I was not able to locate works that use them to compare the performance of circuit simulators. Is there such a thing in CAD research as the fastest program or machine for simulating a set of benchmark circuits? Thanks. Chih-Po Chih-Po Wen graduate student Computer Science Division U.C. Berkeley -- Chih-Po Wen Computer Science Division, University of California at Berkeley cwen@genesis.Berkeley.EDU
Technical Details
Message-ID:
<1grt2nINNsqj@agate.berkeley.edu>Path:
arc1-ca.pugleaf.net!sparky!uunet!spool.mu.edu!agate!asterix.CS.Berkeley.EDU!cpwenShow Full Headers
Complete Article Headers
Path: arc1-ca.pugleaf.net!sparky!uunet!spool.mu.edu!agate!asterix.CS.Berkeley.EDU!cpwen From: cpwen@asterix.CS.Berkeley.EDU (Chih-Po Wen) Newsgroups: comp.lsi.cad Subject: Looking for benchmark suite for circuit simulators Date: 18 Dec 1992 07:02:47 GMT Organization: University of California, Berkeley Lines: 33 Distribution: usa Message-ID: <1grt2nINNsqj@agate.berkeley.edu> NNTP-Posting-Host: asterix.cs.berkeley.edu Keywords: Parallel Timing Simulation