🚀 go-pugleaf

In response to Martin Colley to whom my reply bounced.

  I am looking for a compiler/translator (public domain) that will take
  a description of a state machine and produce the equivalent logical
  equations. ....


Any gate level synthesis tool performs the task you require, at least
implicitly.  Given a state machine, an encoding must be specified or,
often, the tool figures out an encoding for you.  A one-hot encoding
assigns a different storage element to each state of the state
diagram.

Given the encoding and the specification, logic functions for the
inputs to flip-flops and outputs of the designs are derived
automatically.  In state-of-the-art synthesis tools (like Synopsys)
these functions are often represented as Binary Decision Diagrams
which can easily be printed out as logic formulas.  I suspect that
this is true of the BOLD system from the University of Colorado or the
MIS system from Berkeley.

You might contact Fabio Somenzi at Colorado for some information.
fabio@duke.Colorado.EDU

Carl
(pixley@mcc.com)

@ MCC VLSI CAD Program [512] 338-3734
P.O. Box 200195, Austin, TX 78720
ARPA: pixley@mcc.com
UUCP: {ihnp4,seismo,harvard,gatech,pyramid}!ut-sally!im4u!milano!bell!pixley