CADENCE: Verilog and Hilo

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Article #727

#727

From: Juan Carlos Lopez
Date: Mon, 17 Jun 1991 16:29

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	A friend of mine is having some problems integrating Verilog and Hilo 
into the CADENCE Software (SUN-3 environment). Both tools run properly when 
called from the shell, but from the framework menus, some errors are reported:

	- Verilog: Error in the keyfile
	- Hilo: Compilation error

	Any hints would be appreciated. Thanks in advance.

							Juan Carlos
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 Juan Carlos Lopez                 Dpt. of Electrical and Computer Engineering
 Phone:  +1 (412) 268-5236         Carnegie Mellon University
 E-mail: lopez@ece.cmu.edu         Pittsburgh, PA 15213-3890    (USA)

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From: lopez@corolla.ece.cmu.edu (Juan Carlos Lopez)
Newsgroups: comp.lsi.cad,comp.lsi
Subject: CADENCE: Verilog and Hilo
Message-ID: <1991Jun17.162926.28523@fs7.ece.cmu.edu>
Date: 17 Jun 91 16:29:26 GMT
Sender: news@fs7.ece.cmu.edu (USENET News System)
Reply-To: lopez@corolla.ece.cmu.edu (Juan Carlos Lopez)
Organization: Electrical and Computer Engineering, Carnegie Mellon
Lines: 18
Originator: lopez@corolla.ece.cmu.edu