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Article #802

Re: Destroying Xilinx FPGAs by improper configuration?

#802
From: Bohdan Tashchuk
Date: Tue, 12 Jan 1993 11:36
38 lines
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In <scott.726798144@labtam> scott@labtam.labtam.oz.au (Scott Colwell) writes:
>luoni@jasper.mlb.semi.harris.com (Perry Luoni) writes:

>>In article <1993Jan11.142553.5103@ips.cs.tu-bs.de> koch@eis.cs.tu-bs.de (Andreas Koch) writes:
>>>Is it possible to physically destroy a Xilinx 3000 series LCA
>>>by programming only (meaning: outside electrical parameters
>>>are within valid bounds)?

>>Yes, it is possible to short a lot of nodes together with the wrong data programmed into
>>the LCA.  If you are using the Xilinx design software you don't have to worry about
>>it though.  The software will prevent you from programming it wrong.  

>We are worried about this too.  We have been told that as long as the
>configuration only causes internal drivers to clash with each other, the
>device will survive, but if you cause pin drivers to clash with other
>devices on your board, the device can be permanently damaged.

>We are not totally convinced that this is good advice.  We have seen a device
>get _very_ hot with only internal contention.

There are additional ways you can get the devices to fail in the field. The
parts are CMOS, so, for example, if you accidentally let internal nodes
float, the part may conduct more current, get real hot, and fail soft.
Any type of floating node is bad for CMOS, since even dinky little inverters
can draw lots of current when their inputs are floating. And, of course, this
is very lot dependent.

Another poster mentioned that the design software protects you, but that wasn't
always true in the past, and I'm not sure if it's 100% true now. Also, where I
used to work one of the engineers would do all his own routing, since he got
much higher utilization than the software could do. A floating node or two did
slip thru, though, which caused some soft failures out in the field. These
were easy to diagnose, since the Xilinxes did get real hot. We gave our
customers the choice of a new serial PROM with new configuration bits or to
return the product to the factory for replacement of the Xilinx itself.
(Those PQFPs are no fun to rework!) Most customers chose the PROM, and
invariably the overstressed Xilinxes worked fine and ran nice and cool with
the new PROMs. Of course they may well have longer term reliability problems.
Technical Details
Message-ID: <1993Jan12.113615.4416@fasttech.com>
Path: arc1-ca.pugleaf.net!sparky!uunet!ogicse!verdix!islabs!fasttech!zeke
References: <1993Jan11.142553.5103@ips.cs.tu-bs.de> <1993Jan11.201525.26608@mlb.semi.harris.com> <scott.726798144@labtam>

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Path: arc1-ca.pugleaf.net!sparky!uunet!ogicse!verdix!islabs!fasttech!zeke
From: zeke@fasttech.com (Bohdan Tashchuk)
Newsgroups: comp.lsi.cad,sci.electronics
Subject: Re: Destroying Xilinx FPGAs by improper configuration?
Message-ID: <1993Jan12.113615.4416@fasttech.com>
Date: 12 Jan 93 11:36:15 GMT
Article-I.D.: fasttech.1993Jan12.113615.4416
References: <1993Jan11.142553.5103@ips.cs.tu-bs.de> <1993Jan11.201525.26608@mlb.semi.harris.com> <scott.726798144@labtam>
Organization: Fast Technology   Beaverton, OR
Lines: 38