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Article #884

Gate Simulator Followup

#884
From: Richard A. Lethin
Date: Wed, 26 Apr 1989 20:23
66 lines
2724 bytes
A few weeks ago I posted a request for information about gate-level
logic simulators which might be available for free, in source form.
Below is a summary of responses received.

(I also received an offer for the source to a proprietary simulator,
with the caveat that it could not be shared with anyone outside MIT.
Unfortunately, because we're working with Intel on this research
project we couldn't accept it...)




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From: david lewis <lewis@eecg.toronto.edu>
To: lethin@wheaties.ai.mit.edu
Subject: Re: Seeking Gate-level simulator
Date: 	Mon, 10 Apr 89 09:58:19 EDT

I have a simulator that I developed here a while ago that
does gate level and what you might call functional simulation.
Its abstraction is node, more or less buses, so you can
refer to a bunch of signals with a single name. This makes
description of data paths concise. It allows you to mix
logic equations with conventional net-list style stuff, and
has a large set of boolean operators. I have been using it
for 3 years, so it is reasonably bug free. It is only unit
delay, and two state plus strength, so you can do tri-state TTL.
You can have it if you'd like it.

David Lewis
Electrical Engineering
University of Toronto

From: david lewis <lewis@eecg.toronto.edu>
To: lethin@wheaties.ai.mit.edu
Subject: Re: Seeking Gate-level simulator
Message-Id: <89Apr10.103839edt.2397@godzilla.eecg.toronto.edu>
Date: 	Mon, 10 Apr 89 10:38:27 EDT

BTW, this simulator, called tortle, has the advantage that it's
pretty fast: 5-8K node events /sec, equivalent to 25-40K gate
events per second, on a 3 MIP machine. A faster version, running
at 10-90K node events / sec, is running but not yet in a distributable
form.

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Date: Mon, 10 Apr 89 22:46:27 CDT
From: jps@wucs1.wustl.edu (James Sterbenz)
To: lethin@wheaties.ai.mit.edu
Subject: Re: Seeking Gate-level simulator

There's a simulator called LSIM written by Roger Chamberlain, and
modified to include MSI level functions by Mark Edelman, both of 
Washington University.  Theres a tech report out on it; I don't
know if it's being passed around in source form.  If you're interested,
send me e-mail, and I'll forward it to someone that can fill you in.

------

-- 
-- Rich

lethin@wheaties.ai.mit.edu
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From: lethin@wheaties.ai.mit.edu (Richard A. Lethin)
Newsgroups: comp.lsi.cad
Subject: Gate Simulator Followup
Keywords: gate logic simulation
Message-ID: <2012@horizon.ai.mit.edu>
Date: 26 Apr 89 20:23:15 GMT
Reply-To: lethin@wheaties.ai.mit.edu ()
Organization: The MIT AI Lab, Cambridge, MA
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