Thread View: comp.lsi.cad
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Started by edward
Fri, 18 Dec 1992 23:11
LCA design entry using viewdraw
Author: edward
Date: Fri, 18 Dec 1992 23:11
Date: Fri, 18 Dec 1992 23:11
20 lines
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1009 bytes
Hi Folks! When using the long lines in the xilinx 3090 to implement a wide wired-AND function, must we explicitly attach a pull-up to the end of the long line or is this implicitly assumed when you attach a long line attribute to the net. The pull-up primitive that is available in most CAD support for the LCA's seem to refer to the IOBs pull-ups. I assume the pull-ups at the end of long lines are not IOB pull-ups. I am confused. Any help appreciated. Thanks. - edward ------------------------------------------------------ Edward Walker Dept. of Computer Science University of York York, YO1 5DD U.K. Internet: edward@minster.york.ac.uk
Re: LCA design entry using viewdraw
Author: Philip Freidin
Date: Tue, 22 Dec 1992 18:47
Date: Tue, 22 Dec 1992 18:47
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In article <724720308.19647@minster.york.ac.uk> edward@minster.york.ac.uk writes: >Hi Folks! > > When using the long lines in the xilinx 3090 to implement a wide >wired-AND function, must we explicitly attach a pull-up to the end of the >long line or is this implicitly assumed when you attach a long line >attribute to the net. The pull-up primitive that is available in most >CAD support for the LCA's seem to refer to the IOBs pull-ups. I assume >the pull-ups at the end of long lines are not IOB pull-ups. > > I am confused. Any help appreciated. Thanks. > >- edward >------------------------------------------------------ >Edward Walker >Dept. of Computer Science >University of York >York, YO1 5DD >U.K. > >Internet: edward@minster.york.ac.uk Maybe I can shed some light here :-) Answer to above question is YES. The longline attribute is a routing/placement constarint/hint. MORE DETAILS: In the XC3000 family of products, all the horizontal long lines have the following attached to them: 1 TBUF per column (3020 = 8, 3090 =16) 2 Pullup resistors (one at each end) 2 Weak Keeper drivers (One at each end) The strongest driver is the TBUF, the middelest is the Pullup and the weakest is the weak-keeper. The weak keeper is always connected to the line, and the others are connected only if the configuration specifies it. Here are some scenarios: 1) 2 or more TBUFS connected (and of course the weak keepers) to a Horizontal Long Line (HLL). A TBUF is always enabled, except for a few nS during switch over. The line will have the value driven by the TBUF. Weak Keepers sustain the last value driven while the first TBUF is off and the second has not yet turned on. 2) As above, but some fool has two TBUFs enabled. If both TBUFs are sending the same value the line has that value. If they differ, the LOW wins, the chip draws extra current, but does not go up in smoke. (we DO NOT RECOMEND this mode of operation) Weak Keepers have no effect. 3) Like 1, but with one pullup enabled. (On the schematic you do this by attaching a pullup symbol to the net.) Behaves just like 1, except that if you are switching between one TBUF driving low and another TBUF driving low, if there is a period of time when neither driver is enabled, the line is pulled high by the pullup resistor. If the switchover is overlapped (not good if one drives low and the other drives high, causes contention), and both drive the same value, then the pullup has no effect. Weak keepers have no effect. 4) Like 1, but with two pullups enabled. (On the schematic you do this by attaching a pullup symbol to the net and attaching the "DOUBLE" attribute to the pullup. DO NOT attach two pullups to the net!) Behaves just like 1, except that if you are switching between one TBUF driving low and another TBUF driving low, if there is a period of time when neither driver is enabled, the line is pulled high by the pullup resistor (faster than with 1 pullup). If the switchover is overlapped (not good if one drives low and the other drives high, causes contention), and both drive the same value, then the pullup has no effect. Weak keepers have no effect. 5) Two or more TBUFs connected to a HLL, control logic such that they are threestated when their inputs are high, and driving when their inputs are low. We call this open-drain mode and it is just like open-collector mode of TTL of yesteryear. On powerup the line will be low and it will remain so, regardless of what else is going on. Weak Keepers have no (minimal) effect. 6) As above, with one of the pullups enabled. On powerup, the line will start off low, and unless one of the open drain TBUFs is driving low, the pullup resistor will pull it high in a few nS. Whenever one or more TBUFs drive low, the line will be low. When ALL the drivers are not driving, the pullup will bring the line high. This is called WIRED-AND mode. Weak Keepers have no effect. 7) Like 6, but with the "DOUBLE" attribute on the pullup. Like 6 only the pullup is faster, and more power is drawn when driving low. Weak keepers have no effect. 8) One or more TBUFs connected to a HLL, no Pullups, and control logic such that there are times when there are no TBUFs driving the HLL. Like 1, only here we are more expressley relying on the week keepers. The HLL will retain the last value driven by a TBUF, when there are no TBUFs driving. This makes the HLL behave like a distributed latch with a linear select mux on its input (the TBUFs). This capability is rarely used. In the XC4000 family, there is much better support for the open drain mode of operation, and the HLLs can be split in the middle, doubling the number of such lines (but only half the length. Hope this helps Philip Freidin (408)879-5180 -- Philip Freidin: Product Planning Manager, Xilinx, INC (rest of clever .sig still under construction.... coming to a terminal near you, Real Soon Now (tm))
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